After successfully completing this unit, students should be able to apply a variety of application-oriented digital electronics design skills, including:

The design of significant combinatorial & synchronous digital systems
Timing and hazard analysis for reliable digital circuit designs
The use of Electronic Design Automation (EDA) tools for design, analysis and simulation

Teaching Methods:

Lectures (36 hrs), Laboratory work (14hrs), Tutorials (11 hrs).

Lectures: A lecture series supported by written notes and online material is provided. Discussion and exercises in lecture sessions are an essential element of the teaching process.

Tutorials: The weekly tutorials provide re-enforcement of the material covered in lectures. Students will be required to actively participate in the tutorial activities.

Laboratory and Project: The Laboratory and Project program makes use of a set of portable laboratory equipment that is available to students for out of class use. It is expected that students will spend a considerable amount of time out of class doing preparation for, and completing laboratory and project exercises.

Assessment:

Labs/Project (30%), Examination (70%).

Generic Skills Outcomes:

In this unit, students are expected to enhance the Key Generic Skills below as recognised by Engineers Australia. The Unit Outline explains how these outcomes will be achieved.

Ability to apply knowledge of basic science and engineering fundamentals
Ability to communicate effectively, not only with engineers but also with the community at large
Ability to undertake problem identification, formulation and solution
Ability to utilize a systems approach to design and operational performance
Ability to function effectively as an individual and in a multi-disciplinary and multi-cultural teams, with the capacity to be a leader or manager as well as an effective team member
Expectation of the need to undertake lifelong learning, and capacity to do so

Content:

Boolean Algebra and Logic Design

Number systems
Basic Theorems of Boolean Algebra
Canonical and Standard Forms
Logic Gate Implementations and Characteristics: propagation delays, logic levels and compatibility.

Simplification of Boolean Functions

Prime Implicants, etc
Map and Tabulation Methods
Technology Mapping for Gate Arrays
Hazards in digital circuits.

Introduction to Logic Circuits

Combinatorial Components
Adders/Subtracters
Logic and Arithmetic Units
Decoders/Selectors
Buses
Priority Encoders
Magnitude Comparators
Shifters and Rotators
Multipliers
Real world considerations.

Programmable Logic Devices

Read Only Memory
Programmable Logic Arrays (PLAs)
Programmable Array Logic (PALs) Devices
Field Programmable Gate Arrays (FPGAs).

Synchronous Sequential Logic

Latches
Flip Flops
Finite-State Machine (FSM) Model
Synthesis and Analysis
Designing State Machines using State Diagrams
Designing State Machines using ASM (Algorithmic State Machine) Charts
State Minimisation, Optimisation and Timing.

Hardware Description Languages (VHDL)

Combinatorial descriptions
Delta Delays
VHDL hierarchy (Entities, modules, instantiation)
Language constructs (conditional assignment, selected assignment)
Synchronous descriptions (processes, if, case)
VHDL test benches
Synthesis considerations.

Textbooks:

Roth, HR, Fundamentals of Logic Design, 5th edn, Thomson-Brooks/Cole, 2004. ISBN 0-534-37804-8.

References:

Wakerly, JF, Digital Design, Pearson-Prentice-Hall, 2006. ISBN 0-13-186389-4.
Katz, RH, Borriello, G, Contemporary Logic Design, Pearson-Prentice-Hall, 2005. ISBN 0-201-30857-6.
Ashenden, PJ, The Student's Guide to VHDL, Morgan-Kaufmann, 1998. ISBN 1-55860-520-7.

Digital Electronics Design

Unit Code: HET202

Related Course/s: