Design of DSP Architectures

Unit Code:HET513

Credit Points	Duration	Contact Hours	Campus	Prerequisite	Corequisite
12.5 Credit Points	1 Semester	66 hours	Hawthorn, Sarawak	HET329 Digital Signal and Image Processing	Nil

Credit Points

Duration

Contact Hours

Campus

Prerequisite

Corequisite

12.5 Credit Points

1 Semester

66 hours

Hawthorn, Sarawak

HET329 Digital Signal and Image Processing

Nil

Related Course/s:

Aims & Objectives:

This unit aims to address the methodologies needed to design custom or semi-custom VLSI circuits for DSP applications. The subject focuses on the implementation and design of families of DSP architectures using high level architecture transformation with in-depth analysis of the relevant algorithms.

Upon successfully completing this unit, students should be able to design DSP hadrware to be used in various real-time applications with different sampling rates requirements. Student will develop skills to design different DSP architectures that to meet application requirements.

Teaching Methods:

Lectures (48 hours), Labs (12 hours), Tutorials (6 hours)

Assessment:

Test Assignments (0-10%), Examination (60-70%), Experiments (20-30%)

Generic Skills Outcomes:

In this unit, students are expected to enhance the Key Generic Skills below as recognised by Engineers Australia. The Unit Outline explains how these outcomes will be achieved.

Ability to apply knowledge of basic science and engineering fundamentals
Ability to communicate effectively, not only with engineers but also with the community at large
Ability to undertake problem identification, formulation and solution
Ability to utilize a systems approach to design and operational performance
Ability to function effectively as an individual and in a multi-disciplinary and multi-cultural teams, with the capacity to be a leader or manager as well as an effective team member
Expectation of the need to undertake lifelong learning, and capacity to do so

Content:

Review of DSP principles, Design of FIR and IIR filters, Digital Filters structures and representation, quantization and finite word length effects
DSP algorithms : Iteration Bounds: notation of iteration bound and impact on achievable sampling rate, techniques to compute iteration bounds in DSP algorithms
Pipelining and Parallel Processing: Pipelining of FIR digital filters, Parallel processing and design of parallel FIR systems, Pipelining and Parallel processing for low power design
Retiming: Properties of retiming, Retiming techniques, Cutset retiming and pipelining
Unfolding: Unfolding algorithm, Applications of unfolding
Folding: Folding transformation: Design of time multiplexed architectures, Register minimization techniques using lifetime analysis and forward-backward register allocation, Register minimization in the folded architectures
Parallel processing for IIR filters, Low power IIR filter design using pipelining and parallel processing
Programmable digital signal processors

Textbooks:

Keshab, KP, VLSI Digital Signal Processing: Design and Implementation, Jacaranda Wiley, 1999.

References:

Ifeachor, E. C. and Jervis, B. W., Digital Signal Processing: A Practical Approach, Addison-Wesley 1993.

Mitra, S. K.,Digital Signal Processing: A Computer-Based Approach, McGraw-Hill, 1998.

Ambardar, A. Analog and Digital Signal Processing, Brooks/Cole, 1999

Ingle, V.K. and Proakis, J.G., Digital Signal Processing Using MATLAB. Brooks/Cole Pub Co, 1999.

Bayoumi, M.A., VLSI Design Methodology for DSP Architectures, Klumer, 1994